SISOC Semiconductor Technologies
Design Verification EngineerExperience : 3+ years in IP/SoC Level Verification
Skills:
–Languages: Verilog, System Verilog, C, Assembly.
–Methodology: UVM (preferred), OVM, VMM.
–IP Protocols: PCIE, DDR, USB, Ethernet, HDMI,MIPI etc.
–Scripting : Perl/TCL/PYTHON
–Good understanding on Processor/DSP/GLS verification