548 results for Design And Verification Engineer Jobs

Design Verification Engineer- San Francisco Bay Area, CAOptical Interconnect, Data Centers, AIRole Brief:My client is looking for a Principal Design Verification Engineer to lead full chip/block level verification.Responsibilities:Own verification plan for complex SoC with high-speed interfacesDefin...

YOU MUST HAVE WORKING KNOWLEDGE OF EDA tools and Semiconductors! PLEASE HAVE EDA/SEMICONDUTOR EXPERIENCE WHEN APPLYING!Design Verification Engineer…. UVM… Bay Area #7810My client is a very promising, innovative, well-funded startup backed by top-tier investors and trusted by big chip design compani...

Quest Global is looking to add experience in design verification team. We are looking for a dynamic engineer to be part of our organization. Please review below job description ::Title :: Design Verification EngineerLocation: San Jose,CA* Excellent SV-UVM knowledge * Exp in Building components * Goo...

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team worki...

Description Contract Hardware Engineer Mid.Mountain View, CA 9404312+ Months Note: Design Verification Engineer with strong SV, UVM and AXI Experience.Technical:Strong expertise along-with complex SoC/IP debug is mustAt-least 5+ years of experience in System Verilog HVL and C/C++.AMBA AXI bus along-...

Job Title: Design Verification EngineerLocation: Mountain View CA (Day-1 Onsite)Contract: 12+ MonthsExperience: 6+ YearsNote: We are seeking a Design Verification Engineer with strong SV, UVM and AXI experienceTechnical:Strong expertise along-with complex SoC/IP debug is mustAt-least 5+ years of exp...

A client of Innova Solutions is looking for a Design verification Engineer Position type: ContractDuration: 12+ MonthsLocation: Mountain View, CA (Hybrid) As a Design verification Engineer, you will: Minimum Qualifications: Design Verification Engineering ServicesTestbench development – System Veril...

Location: Mountain View, CA (Preferred)/ Can be considered remote.Job Description:What candidate will Be Doing:At-least 10+ years of experience in System Verilog HVL and C++/CAt-least 10+ year of experience in UVM.Experience in complete verification cycle which includes development of test plan, BFM...

Hello,This is Chandrahas from Chuwa America. Hope you are doing well.We have an Immediate opening position for ASIC Design Verification Engineer Position with one of our Prime Vendors.Please find the attached JD below and let me know if you are interested.Please share your Updated Resume and the Rat...

Verification EngineerContract/Contract to HireOn site in Sunnyvale, CA or Austin, TXPay Rate: $75-$85/hour (W2)Mandatory Experience:7+ years experience in architecting and implementing Design Verification infrastructure and executing the complete verification cycleExperience in the development of UV...