8 results for Design And Verification Engineer Jobs in 94102, SF, CA, US

Qualification Required:Typically requires minimum of 5-15 years of experience in System Verilog, UVM.Bachelors OR Master’s Degree Engineering in Electronics or Electrical or Telecom or VLSI Engineering.Roles And ResponsibilitiesAs a member of the design verification team, it is your job to break thi...

About Eridu AI Eridu AI is a Silicon Valley hardware startup focused on accelerating training and inference performance for large AI models. Today’s AI model performance is often gated by infrastructure bottlenecks. Eridu AI introduces multiple industry-first innovations across semiconductors, softw...

YOU MUST HAVE WORKING KNOWLEDGE OF EDA tools and Semiconductors! PLEASE HAVE EDA/SEMICONDUTOR EXPERIENCE WHEN APPLYING!Design Verification Engineer…. UVM… Bay Area #7810My client is a very promising, innovative, well-funded startup backed by top-tier investors and trusted by big chip design compani...

SBT is the exclusive executive recruiting firm for this confidential position.This confidential company is strategically bringing on a hands-on technical DV lead. In this role, the verification expert will be collaborating cross-functionally with a talented team of systems HW engineers and SW archit...

Design Verification Engineer- San Francisco Bay Area, CAOptical Interconnect, Data Centers, AIRole Brief:My client is looking for a Principal Design Verification Engineer to lead full chip/block level verification.Responsibilities:Own verification plan for complex SoC with high-speed interfacesDefin...

Acceler8 Talent is collaborating with one of the most exciting emerging startups developing specialized AI chips optimized for specific model architectures. They are seeking an experienced Design Verification Engineer to join their team.The company's initial product is focused on transformer models,...

Quest Global is looking to add experience in design verification team. We are looking for a dynamic engineer to be part of our organization. Please review below job description ::Title :: Design Verification EngineerLocation: San Jose,CA* Excellent SV-UVM knowledge * Exp in Building components * Goo...

SummaryJoin an ambitious, experienced team of silicon and distributed systems experts as a design verification engineer. You have the opportunity to build a groundbreaking new category of product that revolutionizes the performance and scalability of next-generation distributed computing systems, an...