89 results for Design And Verification Engineer Jobs in Mountain View, CA, US

Lead a team of ASIC design verification engineers to verify IP and subsystems for Qualcomm WIFI and connectivity products. Responsibilities include owning low power test bench architecture, collaborating with cross-geo teams, mentoring engineers, and exploring innovative design verification methodol...

Lead verification efforts of complex CPU and related subsystems, develop verification infrastructure components, execute comprehensive verification plans, implement functional coverage models, and debug designs. Drive methodology improvements and lead a team of engineers.

Architect and develop verification environment and testbench components for ASIC designs. Implement comprehensive test plans and verify designs using various testing methodologies. Perform RTL code coverage and drive new verification methodologies. Mentor junior engineers.

Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP, conducting pre- and post-silicon verification. Tasks include creating and maintaining verification test benches, collaborating with various teams on test methodol...

Responsible for designing verification tests and debugging for ASIC-SoC verification, working on SoC verification cycles from architecture to tape out, and utilizing verification methodologies like UVM/OVM. Expected to work on a highly programmable in-memory computing architecture and to thrive in a...

Ventana Micro Systems is at the forefront of the two hottest trends that are revolutionizing the semiconductor industry: RISC-V and Chiplet Architecture. Check out our CEO talking with global tech analyst Patrick Moorhead about how Ventana combines the extensibility of RISC-V with chiplet technology...

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration.We value humility and believe i...

Responsible for RTL to GDSII Physical Design Implementation, including Synthesis, Placement, Clock Tree Synthesis, Detailed Routing, Optimization, and Physical Signoff Verification. Requires experience in digital physical design, EDA tools, and automation scripting.

What To ExpectTesla's Dojo Silicon Development Team is looking for a Senior, Staff level Design Verification Engineer to develop and manage the verification and test environments. We are looking for the best talent to work on state-of-the-art chip designs, where your limit is only your imagination. ...