39 results for Design And Verification Engineer Jobs in Austin, TX, US

Partner with local and global SOC and IP developers to drive best practices with a target of ongoing productivity improvement. Responsible for the development of verification test bench and implementation. Develop verification test bench components such as drivers, monitors, and response checkers. A...

Job DescriptionPicture yourself developing advanced electronic systems deployed to protect members of our armed services on some of the nation's most sophisticated aircraft. Pretty rewarding, right? And now imagine doing that job while working in a fast-paced environment using state-of-the-art tools...

Develop and debug advanced UVM based test benches, execute RTL verification test/coverage at system level, perform performance and power-aware verification, triage regressions, and debug RTL designs in Verilog and System Verilog. Improve verification processes and methodologies.

CompanyQualcomm Technologies, Inc.Job AreaEngineering Group, Engineering Group > ASICS EngineeringGeneral SummaryAs a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to h...

Duration: 12 months contractRESPONSIBILITIES:Work closely with design and architecture teams to scope the verification tasks and make it happenResponsible for all aspects of verification including RTL verification, formal verification, Coverage.Develop and execute on verification test plans at vario...

Responsible for developing verification test benches, implementing drivers, monitors, and response checkers. Analyze RTL code coverage, direct random stimulus, and develop functional coverage methods. Conduct debugging and root cause analysis, and apply engineering principles.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Job ResponsibilitiesBecome a PoC for assigned module and deliver high quality TB and Testcases to Cadence customersProvides a proactive and creative approach to resolving problems using speci...

DescriptionProject Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.The RoleBe part of Project Kuiper’s sub-team responsible for defining and imple...

Responsible for defining and implementing digital chip SOCs for satellite communications, developing verification environments, detailed test plans, and participating in ASIC validation and system level verification using UVM and other tools.

Responsible for pre-silicon test planning for system interop verification, developing testbenches using SystemVerilog-UVM, coverage development, assertion model development, and formal verification. Involves developing automation to improve verification efficiency.