74 results for Layout Design Engineer Jobs

Based in Southern California with locations in Malibu, Calabasas, Westlake Village and Camarillo; HRL has been on the leading edge of technology, conducting pioneering research and advancing the state of the art.General Description:The Mixed Signal Solutions department at HRL Laboratories is an inte...

Are you passionate about pushing the boundaries of low power analog design? At Dolphin Design, located in the heart of Montreal, we're not just about analog design; we're redefining it. Our team, specializing in sub-threshold design, is a hub for innovation in the field. We're currently seeking a la...

In this Role, you will be accountable for:Design and development of Transistor level analog and mixed signal layout.Device level floorplan, placement, routing, and physical verification.Troubleshoot Physical verification issues to get clean and desired results.In charge of creating and reviewing lay...

Alternate Job Titles:Memory Layout Design Senior EngineerSenior Layout EngineerEmbedded Memory Layout Senior EngineerWe Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning...

Req ID: 124974Remote Position: NoRegion: AsiaCountry: MalaysiaState/Province: PenangCity: PenangGeneral OverviewFunctional Area: EngineeringCareer Stream: Design Engineering HardwareSAP Short Name: LEN-ENG-DHWJob Level: Level 08IC/MGR: Individual ContributorDirect/Indirect Indicator: IndirectSummary...

工作职责1、根据集成电路原理图完成版图设计； 2、规划版图的floorplan，与电路设计工程师合作，优化版图确保电路性能最优化； 3、完成版图物理验证，包括DRC，LVS，ERC等。任职资格1、熟悉全定制设计流程的版图设计，物理验证，参数提取等； 2、集成电路的相关设计验证的从业经验； 3、熟悉全定制设计的EDA工具，包括Cadence/Synopsys, StarRC, DRC/LVS； 4、有3D layout 经验，精通Wafer on wafer 工艺的layout； 5、具有良好的学习能力，沟通能力和团队合作精神。

The role involves board designs across the full product life cycle, working with engineering disciplines to integrate constraints into the PCB CAD database, leading design reviews, performing complex circuit card layouts, and simulating PCB designs for signal integrity. The engineer will also handle...

Responsible for designing complex custom layouts for digital circuits in deep SubMicron CMOS technologies, reviewing floorplans, running layout design verification, and working with circuit design teams to negotiate layout tradeoffs. Involves using advanced CAD tools and ensuring layouts exceed engi...

Job DescriptionsCandidates do not have to have experience on all the tasks below, there will be trainings to new engineers to adapt with Synopsys design and flows.Work on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees...Floor planning, power d...

工作职责根据集成电路原理图完成版图设计； 2.规划版图的floorplan，与电路设计工程师合作，优化版图确保电路性能最优化； 3.完成版图物理验证，包括DRC，LVS，ERC等。任职资格熟悉全定制设计流程的版图设计，物理验证，参数提取等； 2.集成电路的相关设计验证的从业经验； 3.熟悉全定制设计的EDA工具，包括Cadence/Synopsys, StarRC, DRC/LVS； 4.具有良好的学习能力，沟通能力和团队合作精神。