82 results for Design Verification Engineer Jobs in San Jose, CA, US

Responsible for RTL to GDSII Physical Design Implementation, including Synthesis, Placement, Clock Tree Synthesis, Detailed Routing, Optimization, and Physical Signoff Verification. Requires experience in digital physical design, EDA tools, and automation scripting.

Responsible for pre-Si verification and validation of complex SoCs, developing verification methodology and testbenches for digital and mixed-signal blocks, and conducting test plan and coverage analysis for IP blocks and on-chip interconnects.