15 results for Design Verification Engineer Jobs in San Carlos, CA, US

Job Title: Design Verification EngineerLocation: Mountain View CA (Day-1 Onsite)Contract: 12+ MonthsExperience: 6+ YearsNote: We are seeking a Design Verification Engineer with strong SV, UVM and AXI experienceTechnical:Strong expertise along-with complex SoC/IP debug is mustAt-least 5+ years of exp...

Acceler8 Talent has recently partnered with a company that is redefining AI hardware, focusing on maximizing performance for large language models (LLMs) like GPT. With a commitment to cost efficiency and optimizing performance-per-dollar, their technology offers competitive latency and low-level ha...

Description Contract Hardware Engineer Mid.Mountain View, CA 9404312+ Months Note: Design Verification Engineer with strong SV, UVM and AXI Experience.Technical:Strong expertise along-with complex SoC/IP debug is mustAt-least 5+ years of experience in System Verilog HVL and C/C++.AMBA AXI bus along-...

Location: Mountain View, CA (Preferred)/ Can be considered remote.Job Description:What candidate will Be Doing:At-least 10+ years of experience in System Verilog HVL and C++/CAt-least 10+ year of experience in UVM.Experience in complete verification cycle which includes development of test plan, BFM...

ResponsibilitiesCollaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verificationBuild and maintain infrastructure/environment for automation verification of SoC architecture, function and performanceDevelop reusable testbench, con...

About GroqGroq delivers fast, efficient AI inference. Our LPU-based system powers GroqCloud™, giving businesses and developers the speed and scale they need. Headquartered in Silicon Valley, we are on a mission to make high performance AI compute more accessible and affordable. When real-time AI is ...

Role: Design Verification Engineer (Not mre than 14 years profile)Location: Mountain View, CA (working from Google office)5 to10 years - 10 to 14 years- C2C fine Key ResponsibilitiesStrong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs a...

ResponsibilitiesCollaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verificationBuild and maintain infrastructure/environment for automation verification of SoC architecture, function and performanceDevelop reusable testbench, con...

Develop and manage verification and test environments for state-of-the-art chip designs, define verification test plans, verify design functionality through scalable testbenches, and perform integration level testing. Integrate IPs into testbenches, develop regressions, and conduct functional bringu...

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team worki...