昆拓信诚医药研发(北京)有限公司

Sr. Principal Process Design Engineer

Shanghai, Shanghai, CN

27 days ago
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Summary

该职位来源于猎聘 Key Responsibilities

  • Design, develop, and optimize co-packaged optics(CPO) and COB packaging processes (e.g., flip-chip BGA (FCBGA), wafer-level packaging (WLP), SiP, 3D packaging).
  • Collaborate with cross-functional teams (product design, materials, QA) to define packaging requirements and specifications.
  • Conduct DOE (Design of Experiments) to validate process parameters and improve yield.
  • Troubleshoot packaging-related issues (e.g., warpage, delamination, thermal performance) during prototyping and mass production.
  • Perform failure analysis (FA) and root-cause analysis (RCA) using tools such as SEM, X-ray, and CSAM.
  • Evaluate new packaging materials (substrates, underfills, mold compounds) and emerging technologies (TSV, hybrid bonding, fan-out).
  • Create detailed process workflows, SOPs, and technical reports.
  • Ensure compliance with industry standards (IPC, MIL-STD) and customer-specific requirements.
  • Work with suppliers and OEMs to qualify new equipment/tools (e.g., RDL, bumping, die attach, wire bonding, molding).
  • Drive innovation in packaging architecture for miniaturization, thermal management, and signal integrity.

Qualifications

  • Master/PhD in Semiconductor, Materials Science, Mechanical Engineering, Electrical Engineering, or related field.
  • 8+ years of hands-on experience in semiconductor packaging process development.
  • Proven track record in high-volume manufacturing environments (OSAT/foundry experience is a plus).
  • Deep knowledge of packaging technologies (e.g., flip-chip, thermocompression bonding, epoxy dispensing).
  • Proficiency in simulation tools (ANSYS, COMSOL) and CAD software (AutoCAD, SolidWorks).
  • Familiarity with metrology tools (profilometers, bond testers) and statistical analysis (Minitab, JMP).
  • Strong analytical and problem-solving abilities.
  • Excellent communication skills for cross-team and customer collaboration.
  • Fluency in English.
  • Experience with heterogeneous integration (chiplets, CoWoS) or advanced interconnects (Cu-Cu hybrid bonding).
  • Knowledge of reliability testing (HTOL, TCT, HAST) and DOE methodologies.
  • Certification in Six Sigma, Lean Manufacturing, or Project Management (PMP).

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