About the job

Experience Level - 4+ years

Mandatory Skills - DDR, Ethernet and PCI

Location - Bangalore

Notice period - Immediate joiner to 30 days

Job Description :

Proficient in Design verification is a must

Experience in creating a testplan for the blocks owned, testbench development and the delivery ownership is a must

Experience in ARM based CPU sub-system is a must. Experience in SMMU & GIC is desirable.

Experience in creating C lib functions & writing 'C' testcases for SoC DV is a must.

Experience in SV/ UVM based environment and testcase writing is needed.

AXI, AHB experience is must.

Experience in slow-speed peripherals is a must

Experience in writing and debugging complex datapaths is a must

Experience in debugging processors states for SoC verification is a plus

Interested please share your updated resume to [email protected]