Job Title: Mask Layout Engineer

Location: San Jose, CA

Duration: 1-year contract with potential for extension

Pay Range: $60/hr-$70/hr on W2 (DOE)

Responsibilities

• Responsible for mask layout of analog designs for integration into a System-on-a-chip (SoC)
• Work with the circuit designer and the layout lead to understand layout requirements.
• Assess, plan, and execute as required
• Meet scheduled deadlines and communicate potential problems.

Requirements:

• Related Bachelor’s degree with 6+ years work experience or Master’s degree with 3+ years working experience
• FinFET experience
• 3 years’ experience with each of these:
• Layout design of tight matching, low noise, and low power analog blocks, resistors, capacitors, and ESD structures
• IR drop, RC delay, electromigration, self-heating, and cross capacitance.
• CALIBRE DRC, ERC, and LVS reports
• Analog/mixed-signal layout design of SubMicron CMOS circuits
• Analog and DFM best practices

Additional Details:

• Onsite position

Benefits Info: Russell Tobin/Pride Global offers eligible employee’s comprehensive healthcare coverage (medical, dental, and vision plans), supplemental coverage (accident insurance, critical illness insurance and hospital indemnity), 401(k)-retirement savings, life & disability insurance, an employee assistance program, legal support, auto, home insurance, pet insurance and employee discounts with preferred vendors.