143 results for Verification Engineer Jobs in Sunnyvale, CA, US

Please NoteTo provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.Advancing the World’s Technology TogetherOur technology solutions power the tools you use every day--including smartphone...

The application window is expected to close on 1/10/2025 This role can sit in our Milpitas/San Jose office location, or remotely in Austin, TX. What You'll Do: It used to be that high-speed packet forwarding was performed in dedicated ASIC designs. These days we are looking to make those ASICs m...

Siemens EDA Business is a global technology leader in electronic design automation software. Our software tools enable companies around the globe to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technolog...

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team worki...

Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.3 years of experience in physical design, verification, and various methodologies.Experience in Python, Tcl, or Perl scripting.Preferred ...

Snapshot:At Google DeepMind, we've built a unique culture and work environment where long-term ambitious research can flourish. We are seeking a highly motivated Hardware Engineer to join our team and contribute to development of groundbreaking silicon for machine learning inference acceleration.Abo...

Responsible for planning verification of complex digital design blocks, creating comprehensive verification test plans, designing testbenches in System Verilog and UVM, debugging tests with design engineers, and performing coverage analysis to improve stimulus quality.

As a Design Verification Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design, physical design, and verification skills to integrate state of the art machine learning accelerators into custom SOCs, and contribute to power and...

Job Title: ASIC/SoC Design Verification Engineer Position Type: Full-Time / On-Site Location: Fremont, CA Salary Range / Rate: $110,000 - $300,000 Year of Experience: More than 8 years Responsibilities: 1. Collaborate with design engineers and architects to define, document and implement detailed te...

Develop and execute verification plans for units and features, construct testbenches, scoreboards, and stimulus generators, implement functional coverage models, and debug designs in simulation and silicon.