Position Vacant : "Design Verification Engineer"

Location : Hyderabad

Work Mode : WFO

Experience : 4- 10 years

Availability : Immediate to 30 days

Job Summary

We are looking for a skilled and experienced Design Verification Engineer with 4+ years of hands-on experience in verifying complex SoC/ASIC designs. The ideal candidate should have a solid understanding of verification methodologies, RTL design flow, and strong debugging capabilities.

Key Responsibilities

• Verifying RTL implementation for complex digital blocks to ensure high quality
• Develop and execute verification plans, testbenches, and test cases based on design specifications.
• Work on SystemVerilog/UVM based environments for functional and formal verification.
• Perform block-level and system-level verification of digital designs.
• Collaborate with RTL design teams to review specifications and drive quality.
• Debug simulation failures, work with waveform viewers, and resolve design/verification issues.
• Conduct code coverage and functional coverage analysis and ensure coverage closure.
• Participate in assertion-based verification and regression runs.
• Document and maintain detailed records of verification processes and results.
  
  

Required Skills & Qualifications

• 4+ years of experience in ASIC/IP/SOC verification.
• Working experience on PCIe, DMA and/or NVMe protocols required
• Knowledge of bus protocols like AXI/AHB desired
• Hands-on experience with SystemVerilog, UVM, and Verilog
• Strong knowledge of verification methodologies and simulation tools (VCS, Questa, etc.)
• Experience in using waveform analysis tools (DVE, SimVision)
• Familiarity with scripting languages like Python, Perl, or Tcl for automation
• Excellent problem-solving, debugging, and analytical skills
  
  

(ref:hirist.tech)