Experience: 2+ years, Trained Freshers are also welcome
Requirements
Good industry experience in ASIC/FPGA verification.
Required to have sound verification concept of developing test plan/test verification that can verify the requirements/specifications completely and robustly
Required to have working experience in developing SV + UVM based verification env components (such as agents/UVCs, scoreboards, predictors/reference models) and writing tests using constrain random based test sequences.
Excellent problem-solving skills.
Required to have experience in implementing functional coverage, debugging the coverage gaps, and writing tests for coverage
Required to have exposure on code coverage related activities
Value Addition
Recommended to have working experience of FPGA verification compliance to DO-254 standards. Candidate should have experience in dealing with various DO-254 processes during the life cycle of the project
Hands on knowledge in scripting language such as GNU make, perl and python
Recommended to have exposure of verifying DSP blocks such as filters, adders, multipliers limiters using fixed point operations
Ability to work as individual contributor as well as a team player.
Excellent verbal and written communication skills
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