Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Our portfolio of technology helps power our world ---come join our team and see how YOU can make a difference.
Job Description:
Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Our portfolio of technology helps power our world --- come join our team and see how YOU can make a difference.
Job Description
We’re looking for a passionate Staff Analog Design Engineer who is interested in designing analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS /DMOS technologies. Products may include switching regulators, hot-swap eFuse, haft-bridge driver and power management ICs for fast growing markets such as networking, server, telecom, notebook/server core voltage, graphic card core regulator, point-of-load (PoL) and power modules.
Responsibilities
- Analog Design Lead and architects to design IP blocks.
- Design analog circuits including but not limited to: LDO’s, Charge Pumps, Bandgaps, Amplifiers, Drivers, DAC’s, Current Sensing Techniques and other common precision circuits.
- Actively participates in the entire product development cycle, from product definition to product introduction (Trade-offs among Risk Assessment, Cost Analysis and Performance Evaluation)
- Design-For-Test strategic planning (Test Plan Development) to evaluate blocks’ performance
- Conduct design reviews and manage tape out schedule
- Provide guidance to layout engineers on critical analog implementation aspects, monitors progress of layouts, and closes the loop with post layout and simulation.
- Work with cross functional team to evaluate intended product behavior during pre Tape-out and post Tape-out.
- Design Blocks Verification (PVT, Monte Carlo Analysis), Top Level AMS Simulations and Post layout extraction and simulations
- Supervise and train juniors for successful design execution
Preferred Qualification
- Requires BSEE/MSEE or Equivalent in Electrical Engineering
- 5+ years’ experience within analog design
- Comprehensive simulation skills in Cadence Environment
- Highly motivated individual and collaborative team player
- Strong analytical/problem-solving skills and Hands on experiments
- Solid background of BiCMOS & High Voltage BCD Process Technology, reliability, ESD Latch Up
- Strong knowledge of transistor level design and low power design techniques
- Solid understanding of control loop topologies (Constant On Time, Peak/Valley Current Mode, Voltage Mode control loops)
Location: San Jose, CA
MPS offers a comprehensive benefits package. We provide health care coverage, dental and vision, 401(K), Employee Stock Purchase Program (ESPP), up to 11 company paid holidays, and 15- 20 days of paid time off depending on your tenure, generous discretionary company bonuses, and life and disability protection. Employees in sales positions may be eligible for our sales incentive bonuses. Employees in certain positions may be eligible for stock compensation. For more information on MPS’ benefits please view our company website at www.monolithicpower.com.
Pay is based on market location and may vary based on factors including experience, skills, education and other job-related reasons. The base salary range for this position in California is $157,000 - $189,000.
Monolithic Power Systems, Inc. (MPS) is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of MPS to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.