Role: SOC Lead Engineer

Type: Contract

Location: San Jose, CA (Onsite)

Key Skills:

In-depth knowledge and hands-on experience with SOC technologies and tools such as Google Chronicle SIEM, CrowdStrike EDR/EPP, Vectra NDR, Recorded Future TI, etc. Various operating systems, networking protocols, and application architectures. Analytical and problem-solving skills to identify and troubleshoot SOC platform technical issues.

Experience:

• Minimum BE/BS degree (Masters preferred) in Electrical/Electronic Engineering/VLSI with practical experience
• Strong fundamentals in digital ASIC design
• Expertise in ARM v8 and v9 specifications and their impact to SoC system architecture
• Multiple project experience with ARM based ecosystem components (A-series ARM Cores, SMMU, GIC, Coresight, NIC and other complex bus interconnects)
• Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC designs
• Exposure to ARM platform architecture specifications
• Strong experience with Verilog, SystemVerilog, DC/DC-T based synthesis, constraints development and RTL level checks. Low power methodology knowledge will be a plus.
• Understanding of major SOC interfaces like PCIE, DRAM, Flash, I2C, SSP, UART.
• Capable of working with multiple IP vendors and other teams