Principal DSP / Firmware Engineer

Denver, CO

Our exciting Space client are looking for a Principal DSP / Firmware Engineer to play a critical role in both leading and contributing to cutting-edge FPGA Firmware development through all phases of the development cycle: requirements gathering and definition, design, development, prototyping, implementation, verification, testing, integration, calibration, and documentation.

What you’ll do:

• Architect, design, develop, and test FPGA Firmware for our next generation Space & projects.
• Be responsible for Firmware development through all phases of the development cycle.
• Work across multiple technical programs, consolidating efforts into a reduced number of technical architectures
• Design, document, implement, simulate, and test new FPGA Firmware designs including planning and estimation of the required tasks.
• Perform design reviews, code reviews, evaluate implementations, and provide feedback.
• Develop, document, and implement Firmware quality assurance measures following a Continuous Integration and Continuous Delivery (CI/CD).
• Actively engage with systems engineers, scientists, and program managers to translate operational capabilities to system requirements and executable tasks.

Experience Required (mix of the below)

• B.S. in Electrical Engineering. 8+ years minimum relevant experience.
• Extensive experience working with complex systems involving multi-disciplinary technical teams with coupled Digital HW, RF HW, FW, SW, and Mechanical.
• Extensive experience with large FPGAs (Xilinx Ultrascale, Xilinx Ultrascale+, etc.) and high-speed Multi-Gbps transceivers (JESD204B/C, PCIe Gen3, GigE/10GigE on FPGA fabric, etc.) and high-speed DAC and ADC architectures (>2 GSPS) and their respective RTL design, implementation, and test.
• A strong DSP background with extensive experience implementing DSP processing blocks (digital down converters (DDCs), complex digital up converters (DUCs), CIC decimation, fast-time spectral processing, match filtering, autocorrelation and cross-correlation, multi-channel DMA engines at >100 MB/s per channel, arbitrary waveform generators (AWGs) and/or direct digital synthesizers (DDCs) producing wideband modulated signals and frequency-diverse pulse waveforms, etc.)
• Demonstrated experience with FPGA bring-up, debugging, and validation.
• Proficiency in Systemverilog/Verilog including architecture definitions, simulation, and implementation.
• Experience with Python, Linux, embedded systems, and automation scripting.
• Experience with RADAR/Communications DSP modelling, design, and implementation experience (MATLAB/HDL coder, Python CIC/FIR Filters, Beamforming, WIFI, LTE, FFT/IFFT IP cores, multi-subchannel receivers capturing and processing frequency diverse signals, etc.).

If you are interested then please apply today.