该职位来源于猎聘 职责描述：

• High performance Transceiver design, including data-clock recovery circuit(CDR), AFE and DFE related ISI compensation circuit and adaptation algorithm design, high speed P2S/S2P circuit design.
• High performance clock circuit and PLL design
• Analog and calibration related circuit design, including ADC/DAC/Bandgap/LDO and so on.
• Automotive Serdes circuit design. 任职要求：
• Graduated from famous colleges, above MSEE
• Over 3 years mixed-signal or analog circuit design experience.
• Knowledge on automotive system design and
  
  

ISO26262 development procedure is preferred.

• Familiar with mixed-signal and analog simulation tools.
• Familiar with the protocols like PCIE/USB/DP/HDMI/Rapid IO/ MIPI A/C/D/M PHY etc. is preferred.
• Familiar with Die-to-Die interconnection architecture and algorithm is preferred.
• Experience on automotive SerDes chip design is preferred.
• Experience on PHY architecture and algorithm design is preferred. *公司坚持平等原则，公平公正对待不同背景的员工，包含但不限于国籍、性别、宗教信仰、文化背景等方面，提供平等发展机会，构建多元化人才体系