Cisco

Senior FPGA Engineer

Shanghai, Shanghai, CN

11 days ago
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Summary

数据中心事业部-高级FPGA开发工程师-上海

BU Introduction - Datacenter Switching

Datacenter Business Group focus on the future switching needs of datacenter and cloud computing, Products include Cisco flagship switching platform Nexus 3000, Nexus 9000 data center switches and MDS 9000 Fiber Channel storage switches. Datacenter Business Group in Cisco China Research and Development Center, concentrates on next-generation data center switching hardware developments for Nexus 9000 and MDS 9000.

数据中心事业部(Datacenter Switching)

数据中心交换机事业部专注于未来数据中心及云计算交换的需求,其中包含思科旗舰产品,Nexus 3000, Nexus 9000系列云计算交换机产品和MDS 9000系列存储交换机。数据中心交换机自从2006年在思科上海研发中心成立以来,独立承担一系列产品研发,成为全球的主要研发基地,致力于下一代Nexus和MDS系列交换机产品的硬件研发。

Responsibilities:

As key member of Cisco System hardware team, the individual will define and design next generation high-end switch families with a commitment to FPGA design and simulation and also hardware issue debug. Work closely with hardware and software related function teams to make products from concept to production.

工作职责:

作为思科系统硬件团队的核心成员,我们致力寻找一流的人才,设计和定义下一代数据中心核心交换机,职责包括FPGA设计和仿真,系统功能设计和调试,并与硬件工程师,软件工程师等一起解决系统设计问题。我们寻求具有团队精神的人才,和其他团队紧密合作解决设计和生产的问题,积极的工作态度和良好的沟通技能至关重要。

Requirements:

  • Work independently with less supervision, drive the project independently
  • Self-motivation, teamwork and strong communication skills are essential
  • Problem solving requires originality and ingenuity using knowledge gained
  • Proficiency in Verilog/System Verilog design and simulations.
  • Solid background on digital circuit design is necessary.
  • Familiar with FPGA design tools, such as Quartus, Vivado, Libero, Synplify and Modelsim.
  • Experience with VCS and UVM simulation is a plus.
  • Experience with script is a plus, such as Makefile, Python, TCL and Perl.
  • Fluent English on speaking and writing.
  • Familiar with server or switching system architecture is a plus

职位要求:

  • 自我激励,团队合作和沟通
  • 熟悉Verilog/System verilog 设计和仿真
  • 有一定的电路设计和调试经验
  • 熟悉FPGA设计软件,如Quartus, Vivado, Modelsim, Libero, Synplify等
  • 熟悉VCS, UVM 仿真者优先
  • 具有编写脚本语言经验者优先,如Makefile, Python, TCL, Perl等
  • 具有良好的中英文写作和沟通能力
  • 熟悉服务器或者交换机系统架构者优先

Educational Background Typically requires MSEE/CS/Automation Control , 5~10 working experiences.

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