Title: Senior FPGA Design Verification Engineer

Location: Dedham, MA

Job Type: FTE/Permanent

Schedule: 9/80 schedule, every other Friday off

Sign on Bonus up to $3000 for New Hires

Position Overview

We are seeking a Senior Cyber FPGA Design Verification Engineer to join a cross-functional team, responsible for product design from system architecture and requirements allocation through product release and production of secure products.

Key Responsibilities

• Verification Methodology: Define verification methodologies for complex FPGA designs.
• Test Planning & Simulation Setup: Analyze requirements, create test plans, and set up scalable simulation environments using SystemVerilog/UVM.
• Testing & Coverage: Test complex designs, ensuring code and functional coverage, and implement assertions.
• Dynamic Environment Adaptability: Work in a dynamic environment with evolving needs and requirements.
• Collaborative Teamwork: Contribute to team success and collaborate effectively with cross-functional teams.
  
  

Preferred Qualifications

• Experience with OVM/UVM design verification methodologies.
• Proficiency in scripting languages such as bash/csh, Perl, TCL, or Python.
• Strong understanding of VHDL or similar hardware description languages.
• FPGA/ASIC design experience is a plus.
• Familiarity with Xilinx FPGA and advanced functional verification tools is a plus.
• Strong ability to adapt to and thrive in a team-oriented environment.