indie's Vision team develops power-efficient System-on-a-Chip (SoC) ASIC devices for the automotive market. We are seeking an experienced Principal Verification Engineer to lead verification efforts at both the block and chip level, ensuring high-quality and reliable designs. Key Responsibilities * Develop and execute block- and chip-level verification using industry-standard UVM methodology. * Define verification plans and methodologies to ensure comprehensive coverage. * Design and implement test bench infrastructure. * Develop random and constrained random test cases to validate functionality. * Specify and collect functional and code coverage metrics. * Support FPGA emulation teams with test case debugging. * Collaborate with the post-silicon validation team for ASIC bring-up and characterization. Qualifications & Skills * Bachelor's degree in Electrical or Computer Engineering (Master's preferred). * 10+ years of full lifecycle experience with multiple ASIC designs. * Extensive experience verifying System-on-Chip (SoC) devices with embedded processors. * Strong hands-on experience in UVM test bench development and test sequence creation. * Deep understanding of SoC protocols, including AMBA, DDR memory, MIPI, I2C, SPI, and UART. * Expertise in random and constrained random testing using UVM methodology. * Proactive approach to debugging and problem-solving. * Strong written and verbal communication skills. Preferred Experience * Hands-on experience with industry-standard verification tools, protocols, and Verification IP. * Familiarity with power intent verification (UPF). * Experience with design prototyping on FPGAs. * Knowledge of emulation systems such as HAPS and Zebu.