Welcome to Codasip

We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, along with our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products.

Our processor cores are based on the open RISC-V architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions.

Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including our first and largest design center in the beautiful city of Brno, Czechia. Across Europe, we have design teams in Cambridge, Bristol, Munich, Villeneuve-Loubet, Barcelona, Thessaloniki, Heraklion, and Athens. The Codasip team is also based close to its customers, with dedicated sales and application engineers in the USA, Japan, Korea, and China.

Codasip is a European private company backed by well-funded EU grants. Our products are already making a real impact, with billions of devices in the market powered by our processor IP and tools.

Position Overview

• Department: Development IP
• Employment: Full-time
• Experience Level: Mid-Senior (Ph.D./MSc/BSc)
• Location: Germany (Preferably Munich)

Required Knowledge and Skills

• Experience with HW verification (simulation tools, formal tools, methodologies like UVM)
• Knowledge of versioning tools (Git preferred) and Linux
• Software skills (C++ or Python preferred)
• Eagerness to constantly learn new things, active interest in the field, and self-education
• Strong self-organization and reliability

Nice-to-Haves

• Desire to play a role in shaping the RISC-V world of tomorrow
• Knowledge of HDL languages (Verilog, VHDL, or System Verilog)
• Experience in Object-Oriented Programming and software engineering
• DIY activities related to open-source software, home automation, robotics, or similar
• University degree in a related field (Microelectronics, HW design, Embedded SW, Robotics, or similar)

Benefits

• Opportunity to work with RISC-V, the computer architecture of the future
• Working on innovative and unique processor optimization technology (HLS)
• Participation in the entire development process, from analysis to deployment
• Staying in touch with the latest industry trends
• Opportunity to collaborate with experienced developers within the EU and UK
• Receptivity to your own innovations and ideas
• Freedom and trust from Codasip DNA
• Flexible working hours, including a hybrid working mode (2 days office/3 days home office preferred)
• 31 days of holiday leave

SOME USEFUL LINKS

• CODASIP:Codasip RISC V Processor Solutions
• Design for differentiation: architecture licenses in RISC‑V
• Building a Swiss cheese model approach for processor verification
• Efficient verification of RISC-V processors

We're passionate about RISC-V processors. If you are, apply now!