该职位来源于猎聘 Specific duties include: Responsible for verification plan define based on IP design SPEC. Be a key contributor of the team to achieve the coverage driven verification goals. Verification Test-Bench maintain and development. Deep understanding on ASIC verification flow, responsible for milestone delivery check Position Requirements: Master degree with 3+ years or bachelor with 5+ years as an experienced digital IC verification. Experienced in successful tape-out of ASIC chips Familiar to UVM test-bench architecture and experienced on test-bench development. Self-motivation with communication skills (spoken and written English and Mandarin) Be familiar to the coding of SV, Perl/Python, Makefile Experience on verification project management is preferred.