Job Title: ASIC Verification Engineer
Location: Hyderabad (Work From Office)
Education: Bachelor’s or Master’s degree in Electronics Engineering or equivalent
Interview Process: 2 Rounds (Virtual + Face-to-Face)
About the Role:
We are looking for an experienced ASIC Verification Engineer with deep expertise in UFS/Unipro/MPHY subsystems. The ideal candidate will be proficient in developing UVM-based testbenches and defining comprehensive test plans for block, subsystem, and SoC-level designs. This is a high-impact role requiring hands-on experience and a strong grasp of verification methodologies.
Job Requirements
• An expert level experience with UFS/Unipro/MPHY IP/sub-systems.
• Highly experienced with defining block, sub-system and SOC top level test plans.
• An expert level with developing UVM-based SV test-benches.
• Deep understanding and knowledge of verification methodologies flows and quality metrics.
• Great debugging and problem-solving skills.
• Team player with great interpersonal communication skills.
Job Qualifications
• At least 5 years of relevant experience in UFS/Unipro/MPHY verification.
• Strong and relevant expertise with ASIC simulation tools and advanced verification methods.
• Expert level in verification languages such as UVM and System Verilog.
• Relevant experience with writing block-level and SoC test-plans.
Nice to Have: