Jobs 1 - 20 out of 345 for Asic Design Engineer

Lead the design and development of complex ASIC projects from concept to production. Develop RTL code using Verilog and SystemVerilog for various components including Microarchitecture and SOC designs. Collaborate with cross-functional teams to define requirements and deliver optimized designs that ...

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and o...

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and o...

Design, implement, and verify digital blocks for wireless SoCs using SystemVerilog or Verilog. Translate algorithmic and architectural specifications into synthesizable RTL, implement DSP functions, convert chip specifications into RTL, design and develop RTL for various functions, optimize designs ...

The ASIC Design Engineer contributes to the design of digital IP blocks for advanced Satellite communication ASICs. Responsibilities include supporting the design and delivery of ASIC IP blocks, assisting in defining microarchitecture for digital signal-processing and control logic blocks, participa...

At Atom Computing, we build quantum computers using arrays of optically trapped neutral atoms that will empower customers to achieve unprecedented computational breakthroughs. Join a world-class team of scientists, engineers, and business professionals to advance the state-of-the-art in quantum comp...

Position OverviewWe are seeking a Senior ASIC Design Engineer to design and implement next-generation storage SoCs. Responsibilities· Write detailed microarchitecture documents, design specifications, and implementation guidelines.· Design and implement RTL in Verilog/SystemVerilog for...

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and o...

Document and deliver design guidelines for the ASIC team, develop agentic AI solutions for micro-architecture, implement RTL, and deliver fully verified designs. Collaborate with designers and tool owners to ensure design guidelines are met, and use AI technologies to solve complex chip design probl...

Document and deliver design guidelines for high performance, area and power efficient RTL. Develop agentic AI solutions for micro-architecture and implement RTL for verified designs. Collaborate with designers and tool owners to meet design requirements. Design LLM-powered solutions for engineering ...

Document and deliver design guidelines for the ASIC team, develop agentic AI solutions, collaborate with designers and tool owners, utilize AI technologies to solve complex chip design problems, and engage with advancements in machine learning and AI.

CompanyQualcomm Technologies, Inc.Job AreaEngineering Group, Engineering Group > Analog Mixed Signal DesignGeneral SummaryQCT Mixed-Signal IP (MSIP) design team is looking for talented analog integrated circuit designers at various levels to help with designing high-performance and low-power mixed-s...

Translate chip-design expertise into reusable, AI-consumable knowledge bases and agent playbooks. Identify bottlenecks in advanced chip design process and devise novel models, tools, and workflows. Define EDA tool usage strategies for AI-native workflows and evaluation strategies suitable for AI sys...

Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic. Collaborate with verification engineers to create block- and system-level test plans to ensure comprehensive design coverage. Define timing constraints for RTL blocks and work with Physical Desi...

Design and simulate circuits at transistor-level to implement architecture and requirement specifications. Contribute to system-level design, optimize hardware designs for performance, power, and cost. Independently drive solutions to complex problems and contribute to business development activitie...

Define and build high-performance networking ASICs by translating system-level requirements into detailed ASIC architecture. Lead architectural modeling and analysis, collaborate with various engineering teams, and drive integration of high-speed I/O and third-party IPs into the ASIC design.

Responsible for CPU on-chip interconnect network, coherency and last-level caches, including micro-architectural definition, RTL coding, logic debug, synthesis, and timing closure. Collaborate with verification teams and work with implementation to achieve timing, area, performance, and power goals.

**Position:** ASIC Design Engineer (eInfochips) **Job Description:** **Role:** **Asic Design Engineer** **Location: Mountain View CA (Remote)** **Note:** Seeking candidate with Fusion Compiler and Scripting experince. **What candidate will Be Doing:** + Proficient in Verilog/System Verilog...

Application Close DateApplications will be accepted on an ongoing basis until the requisition is closed.At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a cultu...

Application Close DateApplications will be accepted on an ongoing basis until the requisition is closed.At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a cultu...